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Proceedings Paper

A scalable and hardware-efficient architecture for digitally adaptive electronic dispersion compensation
Author(s): Daniel Efinger; Stefan Payer; Halmo Fischer
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Paper Abstract

We present a novel hardware architecture for digitally adaptive feed-forward equalization (FFE) suitable to compensate the inter-symbol interference (ISI) caused by chromatic (CD) and time-varying polarization mode dispersion (PMD) in intensity modulated optical links with direct detection (IM/DD). Existing analog tapped delay lines for realizing the equalization filter at a bit rate of 40 Gbit/s commonly use external manual or random dithering approaches for tap weight adjustment1,2. While manual tap weight adjustment is impractical for systems with randomly time-varying behavior, random dithering of the tap weights to find the optimal setup shows adaptation times above 1s which exceeds the measured PMD variations in installed fibers3 (~10ms) by far. Our solution follows a completely digital implementation approach and it can be scaled to various bit rates using distributed arithmetic (DA) and some parallelization techniques. The digital adaptation unit, which employs a simplified Least-Mean-Square-Algorithm (LMS)4, is directly implemented together with the FFE. Measurements in our hardware-in-the-loop testbed with a Virtex-II field programmable gate array (FPGA) from Xilinx have demonstrated that it is able to track time-varying optical channels well within 1 ms at a bit rate of 10.7 Gbit/s.

Paper Details

Date Published: 25 November 2009
PDF: 11 pages
Proc. SPIE 7632, Optical Transmission Systems, Switching, and Subsystems VII, 763206 (25 November 2009); doi: 10.1117/12.852371
Show Author Affiliations
Daniel Efinger, Univ. Stuttgart (Germany)
Stefan Payer, Univ. Stuttgart (Germany)
Halmo Fischer, Agilent Technology R&D and Marketing GmbH & Co. KG (Germany)

Published in SPIE Proceedings Vol. 7632:
Optical Transmission Systems, Switching, and Subsystems VII
Dominique Chiaroni, Editor(s)

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