The effect of the deposition parameters and Ge content on the stress gradient in poly-SiGe films was investigated. The films, ranging in thickness from 1.2 to 2.3 μm, were deposited by chemical vapor deposition (CVD) at 450 °C and plasma enhanced chemical vapor deposition (PECVD) at 520 °C. The Ge content was varied between 45 and 64 at%. Xray diffraction revealed that both PECVD and CVD films were polycrystalline. The stress gradient was determined by measuring the deflection of 1 mm long released cantilevers. The stress gradient was found to decrease with increasing Ge content. A CVD film with 55 at% Ge was thinned using a very low power SF₆/O₂ plasma. The stress gradient was measured as a function of film thickness. The stress profile was calculated by matching the bending moment of the calculated profile to the bending moment obtained from the measured stress gradient. The largest change in stress occurs right at the thin film/substrate interface. PECVD films were found to possess a lower stress gradient compared to CVD films with similar thickness. This was explained by differences in TEM microstructure: CVD films have more Vshaped grains, while PECVD films have more columnar grains.

For mirror MEMS structures, curvature due to film stress degrades optical quality. Cr/Au is the usual metal mirror coating, and is usually thought to have increased stress for increased thickness. Here, we show that is not the case, due to the physics of thin film formation that entail a phase transition from island to laminar stages as thickness increases. Maximum stress occurs just before the transition, and minimum stress just after. We show this transition for the first time for Cr/Au films on silicon. Cr thickness is kept at 50 Å, and gold thickness varied. We find that the transition between island and laminar phases occurs at a gold thickness of ~ 300 Å. Thus, minimum stress, and maximum radius of curvature occurs at a gold thickness of 400 Å. We also show that at this gold thickness, reflectivity is 95 % of what it is for very thick gold. Thus, this is an optimum value of gold thickness for MEMS micromirrors.

A novel concept for low-cost, wafer-level packaging of MEMS is proposed and applied to vacuum packaging of INO’s 160x120 pixel uncooled bolometric focal plane arrays, FPAs, based on vanadium oxide thermistor material. A wafer-scale metallic tray composed of several tens of micropackages is electroplated by using the thick resist SU-8 as a micromold. FPA dies and infrared windows are then soldered to the main tray by flip-chip bonding. Contrary to the conventional wafer to wafer bonding approach, assembly and vacuum sealing steps are dissociated. For this purpose, each micropackage is equipped with a pump-out hole for outgassing under vacuum and at elevated temperature prior to vacuum sealing. The process flow for fabrication of micropackages is described. The influence of DC and pulse plating conditions on the stress and properties of deposited nickel packages was investigated. Results on the selective electroplating of indium solder on antireflection-coated IR window wafers and the formation of a solderable layer around the chip are presented.

Simulations and experiments on three kinds of Si tip fabrication techniques had been done, which are Anisotropic Dry Etching (ADE) , Anisotropic Wet Etching (AWE) and AWE combining with bonding. The simulation results showed that the parameters applied in the ADE and AWE should be controlled much more precisely than AWE combining with bonding to get expected tips. The exp eriments prove that the parameters of fabricating silicon tip by ADE and AWE have little tolerance. The conclusions on AWE combining with bonding drew from simulations are verified in the detail experiments. From the simulations and experiments, excellent reliability and controllability are witnessed in AWE combining with bonding and a tip with top diameter within 23.44nm had been achieved.

Radio frequency microelectromechanical systems (RF MEMS) is an enabling technology for the miniaturization of future radar and communication systems. RF MEMS ohmic and capacitive switch performance and fabrication are discussed. Sandia National Laboratories’ program in RF MEMS is motivated by defense and national security applications not currently being met by the private sector. Examples of fabricated switches and switched circuits under investigation at Sandia are presented.

An electrochemical transducer system embedded in silicon nitride cantilevers has been fabricated for simultaneous Scanning Electrochemical Microscopy (SECM) and Atomic Force Microscopy (AFM) analysis. Sharpened high-aspect ratio silicon tips are shaped combining isotropic and anisotropic deep-reactive etch processes and form the body of the transducer. Deposition of a silicon nitride followed by a back-etch step allows embedding these silicon tips in a silicon nitride layer so that they protrude through the nitride. This way, embedded silicon tips with a diameter smaller than 600 nm, a radius smaller than 50 nm, and an aspect ratio higher than 20 can be achieved. Subsequently, a platinum layer and an insulator layer are deposited on these tip structures. Introducing a metal masking technology utilizing Focused Ion Beam (FIB) technology, a precise exposure of the buried metal layer can be achieved to form ultra-micro electrodes on top of the tip. Finally, cantilever structures are shaped and released by etching the silicon substrate from the backside. Electrochemical and impedance spectroscopic characterization show electrochemical functionality of the transducer system. Due to the high aspect ratio topography of the tip structure and low spring constant of silicon nitride cantilevers, these probes are particularly suited for high resolution SECM and AFM analysis. Furthermore, this technology allows a production of both linear probe-arrays and two-dimensional probe-arrays.

This paper illustrates a novel MEMS technology that allows the creation of a multiple axis actuator / sensor trough deep silicon etching and wafer bonding techniques. As example a dual axis rotational high-stroke MEMS actuator is presented. This device can integrate a mirror to realize a device used, for example, in fully optical multiplexer. Microfabrication technology derives from our previous works and it’s based on deep silicon trench techniques as well as on wafer bonding capabilities. More over the resulting assembly after the wafer bonding is machined to proceed on realizing the complete MEMS device.

With the emergence of wired and wireless communication technologies, on-chip inductors find applications in a variety of high performance radio frequency (RF) circuits. In this work, we present two approaches for high-performance copper inductors in an RF technology. In the first approach (Type I), we lower ohmic losses to realize a high Q-factor. This is achieved by using, for the first time in a manufacturable technology, 4 μm thick copper spirals along with a 4 μm thick copper underpass on high-resistivity substrates (75 Ω-cm). The underpass is connected to the spirals with a 4 μm tall copper via, which lowers spiral to underpass capacitance. For further lowering the capacitive losses, an additional 6.1 μm thick interlayer dielectric separates the underpass from the substrate. In the second approach (Type II), we utilize a novel one-mask CMOS-compatible micromachining scheme to eliminate substrate losses. This is achieved by completely removing the silicon substrate from directly below the inductors. For a 1.1nH inductor, peak-Q shows an impressive two-fold improvement from 26.6 at 3.8 GHz for Type I inductor to 52.8 at 8.2 GHz for Type II inductor after silicon micromachining. The resonant frequency increases from 18 GHz to 27 GHz after substrate micromachining.

The market of portable instruments is growing more and more. For applications such as computers, cellular phones and microsystems, it is essential to reduce size and weight of electronic devices, including power unit supplies associated with these products. This evolution will require high efficiency on-chip DC-DC converters providing low voltage for the various Ics. Therefore, fabrication of magnetic components dedicated to power conversion becomes necessary. To miniaturize inductors, the micromachining techniques provide solutions based on low-temperature process compatible with active part of the converter. In this paper, a "spiral type" inductor topology designed for power electronics application is investigated. Thick resist molds photolithography and electroplating techniques are used to achieve the copper conductor and the NiFe laminated magnetic core.

Time division multiplexed (TDM) plasma etch processes have been widely applied to MEMS device manufacturing due to the capability of defining high aspect ratio features at high etch rates and mask selectivity. To etch anisotropic features using F-based chemistry, a TDM process cyclically alternates between etch and passivation steps, which are normally carried out with different gases introduced into a reaction chamber at different flow rates, and during which chamber pressures are maintained at different levels. Conventional process control methods often result in chamber pressure overshoot and/or undershoot, slow pressure response times, and long-term pressure drifts. These are undesirable effects in manufacturing MEMS devices due to the requirements on process stability, reliability and repeatability. At Unaxis USA Inc., a proprietary control technique has been developed for the TDM etch processes to better control chamber pressures and improve process stability. Controls over the movement of a throttle valve are realized through a combination of pre-positioning the valve and regulating it with the proportional, integral and derivative (PID) function mechanisms. Using this technique, we have demonstrated in fast TDM processes that pressure overshoot and undershoot are significantly suppressed, pressure response times are improved, and long-term pressure drifts are eliminated. To this end, this new control technique has been successfully tested in processes where the etch/passivation process steps are alternating at frequencies up to 1 Hz. Applications of this advanced technique in deep silicon etching have demonstrated improved etch performance. As a result, this advanced pressure control technique enables the TDM dry etching technologies for MEMS devices manufacturing to become markedly more reliable and stable.

Deep Reactive Ion Etch (DRIE) has historically been regarded as a process possessing inherent variable response. These varying responses include etch rate, mask selectivity, etch depth uniformity across the wafer, and the overall profile of the features being etched. Several factors are thought to lend themselves to this observed variation. Among them are process temperature disparities and residual parasitic compounds within the reaction chamber itself. A long term experiment was carried out to examine the statistical difference between DRIE runs with and without a specially defined pre-process conditioning recipe. This recipe was developed with the expectations of serving a twofold effect: the first serving as a “warm-up” of the process chamber to a steady state temperature, and the second being a stripping of residual organic compounds within the chamber that might otherwise add variance to the following DRIE process. The pre-process recipe has duration of ~30 minutes. The results of the experiment performed will clearly show that this conditioning recipe run prior to processing reduces the typical variance of DRIE processing.

Knowledge of the magnitude and characteristic length scales of chip-scale process variations due to varying substrate pattern density is essential if compensation measures, such as incorporation of dummy structures, are to be taken during mask layout. Effects of variations in local pattern density on a deep reactive ion etch (DRIE) process have been investigated, and a decrease of the etch rate with increasing local pattern density within a characteristic radius of approximately 4.5 mm has been found. Analytical and numerical calculations confirm the existence of a similar depletion radius under the experimental conditions used.

P⁺ walls through wafer can be considered as key regions in the 3D architecture of new bi-directional current and voltage power integrated devices. Moreover, these P⁺ walls can be used as electrical vias in the design of microsystems, in order to make easier 3D packaging. In this paper, we demonstrate the possibility of fabricating these P⁺ walls combining the deep RIE of silicon and deposit of boron-doped polysilicon.

In this paper, deep microstructures on fused silica material, which are useful for fabrication of the fiber optic sensors, were obtained by using a wet chemical etching process. The etching solutions and the masking materials used for developing deep structure are described in this paper. The etch rate of a fused silica diaphragm in room temperature ranged from 46nm per minute to 83nm per minute with different concentrations of Buffered Hydrogen Fluoride (BHF). The etch depth of one step etching was 25μm with the surface roughness less than 20nm (peak-to-peak value). The optical reflectance from the deep etched surface was 4%, which is the same as a well-cleaved fiber end face. This result made the visibility of interference fringes from the single mode fiber optic sensors to be as high as 96%. Furthermore, two-step structures on the fused silica diaphragms with the total depth greater than 35μm are demonstrated. To the best knowledge of the authors, this is the deepest structure produced by wet etching process on fused silica material. Fiber optic pressure sensors based on deep etched diaphragms were fabricated and tested. Fabrication of microstructures on the fiber end faces by using this process is therefore possible.

As a femtosecond laser has recently been developed, both of high power and high photon density are easily obtained. The high photon density results in photopolymerization of urethane acrylate resin whose absorption spectrum is shorter than that of the femtosecond laser. The stereo-lithography using the two-photon absorption (TPA) makes micro structures with great resolution. We used this phenomenon to make micron-sized structures with sub-micron resolution. Before fabricating 3-D structures, precise 2-D structures were preceded. The TPA photopolymerization was applied of poly-dimethyl siloxane (PDMS) molding. In this paper, we report the recent progress and application of this technology in our laboratory.

Embedded waveguides and their optical properties in bulk silicate glasses fabricated by femtosecond (fs) laser pulses (800 nm, <120 fs, at 1 kHz) are reported. Experimental results show that there is a narrow operating window for our system to produce low loss waveguides. An angular dependence of light transmission measured between two crossed polarizers on these laser-modified regions suggests that these regions possess an optical birefrigent property. Furthermore, the optical axes of laser-induced birefringence can be controlled by the polarization direction of the fs laser. Permanent optical birefringence induced by the fs laser pulses can be produced in amorphous silica, and borosilicate glass. Raman spectroscopy of the modified glass shows a densification and reconstruction of silica network in the glass. Results show that the amount of laser-induced birefringence depends on pulse energy level and the number of accumulated pulses. Mechanisms that contribute to the observed laser induced birefringence behavior are discussed.

A process for the rapid replication of electroforming plastic micromolds has been developed at Sandia National Laboratories, Livermore, CA. The process is based on injection molding of plastic replicates with integral metallic screens to produce sacrificial electroforming molds in which the metallic screen acts as the conducting base and the plastic features provide insulating sidewalls. The process consists of injecting molten PMMA via a center-gate into a disk-shaped mold cavity in which a sandwich of a flow channel plate, porous Nickel foam, and metallic microscreen are placed on top of the LIGA-fabricated tooling. A numerical model for the coupled heat transfer and fluid flow phenomena is used to investigate the effects of various process parameters on the mold-filling behavior. The results from the parametric studies are presented and discussed.

In this paper we present a novel fabrication method for the realization of complex 3D multi-layer structures with commercially available photoresists. This method is based on the observation that during an image-reversal process, the post exposure bake (PEB) that is used to reverse the contrast of the exposed pattern reduces the sensitivity of the unexposed photoresist at the same time. In multi-layer lithography, this phenomenon, along with non-uniformly distributed dose can be exploited to eliminate the re-patterning effect of the subsequent exposures and thus makes suspended 3D structures possible. In this presentation we demonstrate this observation experimentally, and fabricate “woodpile” structures (≥ 3 layers) using the proposed method.

A method to fabricate a high precision X-ray mask for Ultra Deep X-ray Lithography (UDXRL) is presented in this paper by use of a single substrate. Firstly, an 8-μm layer of positive photoresist is patterned on a 500 μm thick beryllium substrate by use of UV lithography and 5 μm gold is electroplated out of a sulfite based commercial plating solution. Secondly, the photoresist is removed and 15 μm of SU-8 is spincoated and baked. The layer of SU-8 is patterned by use of an exposure from the backside of the substrate with a soft X-ray source, followed by post-exposure bake and development. An additional 5 μm layer of gold is electroplated on top of the first gold pattern thereby increasing the total thickness of the absorber on the X-ray mask to 10 μm. After the removal of the SU-8 resist, the second step of the process is repeated by use of a thicker layer of SU-8 (up to 100 μm) to obtain the high-precision and high-aspect ratio absorber pattern. Using this method, the maximum dimensional error of the fabricated gold pattern remains under 1 μm, while the smallest absorber feature size is 10 μm.

In this paper we show that BCB wafer bonding, combined with deep-reactive-ion-etching (DRIE) for silicon, and HF etching for FOTURAN glass are viable methods to fabricate three-dimensional microfluidics. The BCB film is patterned by dry-etching technique with a photoresist mask and the target wafer is then bulk-micromachined together with the BCB mask. The two micromachined wafers are then bonded together under vacuum or nitrogen gas environment, at low temperature. Silicon-glass, silicon-silicon and glass-glass are all possible bonding pairs using thermocompressive bonding with BCB. It was found that hard-cured BCB bonding is more suitable for microfluidic channel fabrications than soft-cured BCB bonding, due to adhesive overflows in microfluidic channels and delamination during wet etching.

Bi/In thermal resist is a bilayer structure of Bi over In films which can be exposed by laser with a wide range of wavelengths and can be developed by diluted RCA2 solutions. Current research shows bimetallic resist can work as etch masking layer for both dry plasma etching and wet anisotropic etching. It can act as both patterning and masking layers for Si and SiO₂ with plasma “dry” etch using CF₄/CHF₃. The etching condition is CF₄ flow rate 50 sccm, pressure 150 mTorr, and RF power 100 - 600W. The profile of etched structures can be tuned by adding CHF₃ and other gases such as Ar, and by changing the CF₄/CHF₃ ratio. Depending on the fluorocarbon plasma etching recipe the etch rate of laser exposed Bi/In can be as low as 0.1 nm/min, 500 times lower than organic photoresists. O₂ plasma ashing has little etching effect on exposed Bi/In. Bi/In also creates etch masking layers for alkaline-based (KOH, TMAH and EDP) “wet” anisotropic bulk Si etch without the need of SiO₂ masking steps. The laser exposed Bi/In etches two times more slowly than SiO₂. Experiment result shows that single metal Indium film exhibits thermal resist characteristics but at twice the exposure levels. It can be developed in diluted RCA2 solution and used as an etch mask layer for Si anisotropic etch. X-ray diffraction analysis shows that laser exposure causes both Bi and In single film to oxidize. In film may become amorphous when exposed to high laser power.

We have developed an improved vapor-phase deposition method and an apparatus for the wafer-scale coating of monolayer films typically used in anti-stiction applications. The method consists of a surface preparation step using an O₂ plasma followed by the tunable deposition of a monolayer film in the same reactor. This process has been successfully applied to MEMS test structures and has demonstrated superior anti-stiction performance. The deposition process allows tuning of the film properties by the precise metering of the precursor and a catalyst as part of the process control scheme. The anti-stiction monolayer film deposited from dimethyldichlorosilane (DDMS), tridecafluoro-1,1,2,2-tetrahydrooctyltrichlorosilane (FOTS), and heptadecafluoro-1,1,2,2-tetrahydrodecyltrichlorosilane (FDTS) were characterized using contact angle analysis, atomic force microscopy (AFM), and X-ray photoelectron spectroscopy (XPS). The coefficient of static friction was measured using a sidewall test device and the work of adhesion using a cantilever beam array. The results showed that excellent quality, uniformity, and reproducibility could be achieved across a whole wafer using this method and equipment.

Microelectromechanical systems (MEMS) device manufacturers today are faced with the challenge of protecting electronic circuitry and other sensitive device structures during deep silicon wet-etch processes. Etch processes of this nature require prolonged exposure of the device to harsh corrosive mixtures of aqueous acids and bases at higher than ambient temperatures. A need exists for a spin-applied polymeric coating to prevent the exposure of such circuitry against the corrosive etchants. The challenge exists in developing protective coatings that will not decompose or dissolve in the etchants during the etch process. Such coatings require superior adhesion to the substrate without destroying the sensitive features below. Brewer Science, Inc., has developed a multilayer coating system for basic etchants which is compatible with a variety of semiconductor materials and offers protection against concentrated potassium hydroxide (KOH) etchants at prolonged exposure times of more than 8 hours. In addition, a second multilayer coating system is being developed for use with strong hydrofluoric and other various mixed acid etchants (MAEs) for exposures of 30 minutes or longer. These materials are specifically designed to protect circuitry subjected to concentrated MAEs during the wafer thinning processes used by MEMS device manufacturers.

Gray scale lithography is an attracting technology to fabricate 3D structures such as a microlens, prism etc. In this study, a gray scale chrome mask was fabricated by using image-processing software and E-beam lithography system that can use bitmap as drawing data. Random dither pattern and half-tone pattern by circles were generated as a fundamental micro pattern. UV exposure was performed on 10μm thick positive resist (AZ-p4620). The mask was distanced 80μm from the resist surface to defocus the micro pattern. As a result, half-tone pattern provides smooth surface while the surface condition of dither pattern had a horizontally large roughness. The resist depth was changed in the range of 20%-80% gray-scale value for the dither pattern, and in the little wider range of 20%-90% for the half-tone pattern. Then, Fresnel lens profile was formed by using half-tone pattern, which profile was calculated by C-code program and polar-coordinates conversion by image-processing software.

Microfabrication technologies require adequate design methodologies since there is a strong interaction between the shape or the layout of microstructures and their fabrication process sequence. Both areas are subject of design. This paper gives an overview over the different design methodologies in design of microstructures focusing on fabrication process design. To derive the novel design models, the different approaches in digital, analog, mixed-signal, and MEMS design are described. The second part of the paper addresses the state of the art in process flow design tools. Eventually a new software environment based on the design models is presented that is based on current software technologies and platform independent programming

Multi-component systems (heterophases, layered, porous, misfit, composite) present the interest for different spheres of science and engineering. The paper covers both theoretical and experimental investigations of such systems with varying concentration and configuration of inclusions. En equations describing the dependence of electronic properties (thermomagnetic and galvanomagnetic as well as electrical and thermoelectric ones) of such systems on concentration and configuration of inclusions are presented. The equations derived may be used for analysis of electronic properties of advanced heterostructures. The above model describing the dependence of electronic properties of multi-component heterophase systems on concentration and configurations of inclusions allows to point out the ways for improving of electronic properties (thermoelectric effectiveness, thermoelectric and thermomagnetic figure of merit, etc.) and for extending of functional possibilities of such systems. So, the approach offered may be used for optimization of properties and for design of microdevices with improved characteristics. The work was partly supported by the Russian Foundation for Basic Research (RFBR), Gr. No. 01 - 02 - 17203.

In this paper we present a technology for wall shear stress and pressure integrated sensor fabrication. Thanks to the use of SOI wafers and wafer bonding technique, we came up with an innovative technology that provides high on-chip density of sensors required for arrays utilized in numerous microfluidic applications like active control of flow. At the end some wall shear stress results are presented.

An original new design for manufacturing a piezo-resistive type micro-accelerometer made by Si bulk micro-machining is proposed. The enhancements applied by the authors especially in design and also in processing and control techniques lead to a more precise device, having a superior reliability. Opposite to classical type, the new model have shorter cantilever, enabling to have an uniform stress and so permitting us a long piezo-resistor design. This in turn enables the use of low surface boron concentration of diffused resistors, resulting in a low temperature drift. After ANSIS simulation, showing the benefits of this new design, it follows the description of layout-based surface and volume control elements, and finally the processing enhancements applied to give a 1g piezo-resistive accelerometer

The great interest to conducting polymer composites (CPC) is connected with wide possibilities of their technical application. Low (light) specific weight, high corrosion firmness, stable working capabilities under extreme conditions are typical features of CPC, mechanical and thermal properties of which are not less significant than of traditional conducting materials. The presented work is devoted to creation and investigation of some electro-physical properties of new CPC on the basis of some silicon and carbon black fillers. It was established that the properties of CPC essentially depend not only on the selection of CPC components, but also on the technological methods of production of these conducting materials. For obtaining of CPC with desirable conducting properties the method of polymerization filling with simultaneous application of high pressures (up to 1000 MPa) at variation of temperature from range of 150 ... 250°C has been used. The obtained CPC materials in view of thin (0,2 ... 2mm) sheets are characterized by anomalous dependence of electrical resistance on temperature - sharp change of electrical resistance by 3-4 orders. Our investigation shows that this change is reversing. The temperature at which the change takes place depends on pressure, applicable to the samples. It was established also that external electrical pulses might reach analogical change of the sample resistance level. We make conclusion that these CPC adsorb the electromagnetic waves in the range from some millimeters to 3-4 centimeters. Of these materials adsorption coefficients are up to 0,7. The obtained materials are flexible in wide range of temperatures (-140 ... 250°C) and their mechanical modules are up to 10 MPa.

Micro-and nanoelectromechanical systems (MEMS and NEMS) enable the development of smart products and systems by augmenting the computational ability of microelectronics with perception and control capabilities of micro/nanosensors and micro/nanoactuators. Silicon carbide (SiC) is well known for its excellent properties, making it an outstanding candidate as a structural material for MEMS and NEMS. This paper reviews some of the more significant accomplishments by our group in developing the 3C- polytype of SiC for MEMS and NEMS. Forming the cornerstone of this effort are two key thin film deposition systems that are used to deposit single crystalline and polycrystalline 3C-SiC films for bulk and surface micromachined devices. This paper presents an overview of these two deposition systems, their applicability in MEMS, as well as specific devices that have been fabricated using films from these reactors.