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Proceedings Paper

Common hardware-in-the-loop framework development
Author(s): Hajin Kim; Roger Billings; Richard D. Mohlere; Stephen G. Moss; Charles B. Naumann
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Paper Abstract

An approach to streamline the Hardware-In-the-Loop simulation and test process is under development. This technique will attempt to provide a more flexible, scalable system. The overall goal of the system will be to reduce cost by minimizing redundant development, operational labor and equipment expense. This paper will present historical progress and current test results.

Paper Details

Date Published: 10 May 2012
PDF: 9 pages
Proc. SPIE 8356, Technologies for Synthetic Environments: Hardware-in-the-Loop XVII, 83560O (10 May 2012); doi: 10.1117/12.923090
Show Author Affiliations
Hajin Kim, U.S. Army Aviation & Missile Research, Development and Engineering Ctr. (United States)
Roger Billings, WideBand Corp. (United States)
Richard D. Mohlere, Simulation Technologies Inc. (United States)
Stephen G. Moss, The AEgis Technologies Group, Inc. (United States)
Charles B. Naumann, Optical Sciences Corp. (United States)

Published in SPIE Proceedings Vol. 8356:
Technologies for Synthetic Environments: Hardware-in-the-Loop XVII
James A. Buford Jr.; R. Lee Murrer Jr.; Gary H. Ballard, Editor(s)

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