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Proceedings Paper

Energy consumption estimation of an OMAP-based Android operating system
Author(s): Gabriel González; Eduardo Juárez; Juan José Castro; César Sanz
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Paper Abstract

System-level energy optimization of battery-powered multimedia embedded systems has recently become a design goal. The poor operational time of multimedia terminals makes computationally demanding applications impractical in real scenarios. For instance, the so-called smart-phones are currently unable to remain in operation longer than several hours. The OMAP3530 processor basically consists of two processing cores, a General Purpose Processor (GPP) and a Digital Signal Processor (DSP). The former, an ARM Cortex-A8 processor, is aimed to run a generic Operating System (OS) while the latter, a DSP core based on the C64x+, has architecture optimized for video processing. The BeagleBoard, a commercial prototyping board based on the OMAP processor, has been used to test the Android Operating System and measure its performance. The board has 128 MB of SDRAM external memory, 256 MB of Flash external memory and several interfaces. Note that the clock frequency of the ARM and DSP OMAP cores is 600 MHz and 430 MHz, respectively. This paper describes the energy consumption estimation of the processes and multimedia applications of an Android v1.6 (Donut) OS on the OMAP3530-Based BeagleBoard. In addition, tools to communicate the two processing cores have been employed. A test-bench to profile the OS resource usage has been developed. As far as the energy estimates concern, the OMAP processor energy consumption model provided by the manufacturer has been used. The model is basically divided in two energy components. The former, the baseline core energy, describes the energy consumption that is independent of any chip activity. The latter, the module active energy, describes the energy consumed by the active modules depending on resource usage.

Paper Details

Date Published: 3 May 2011
PDF: 11 pages
Proc. SPIE 8067, VLSI Circuits and Systems V, 80670V (3 May 2011); doi: 10.1117/12.888264
Show Author Affiliations
Gabriel González, Univ. Politécnica de Madrid (Spain)
Eduardo Juárez, Univ. Politécnica de Madrid (Spain)
Juan José Castro, Univ. Politécnica de Madrid (Spain)
César Sanz, Univ. Politécnica de Madrid (Spain)

Published in SPIE Proceedings Vol. 8067:
VLSI Circuits and Systems V
Teresa Riesgo; Eduardo de la Torre-Arnanz, Editor(s)

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