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Proceedings Paper

Two-dimensional systolic-array architecture for pixel-level vision tasks
Author(s): Julien A. Vijverberg; Peter H. N. de With
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Paper Abstract

This paper presents ongoing work on the design of a two-dimensional (2D) systolic array for image processing. This component is designed to operate on a multi-processor system-on-chip. In contrast with other 2D systolic-array architectures and many other hardware accelerators, we investigate the applicability of executing multiple tasks in a time-interleaved fashion on the Systolic Array (SA). This leads to a lower external memory bandwidth and better load balancing of the tasks on the different processing tiles. To enable the interleaving of tasks, we add a shadow-state register for fast task switching. To reduce the number of accesses to the external memory, we propose to share the communication assist between consecutive tasks. A preliminary, non-functional version of the SA has been synthesized for an XV4S25 FPGA device and yields a maximum clock frequency of 150 MHz requiring 1,447 slices and 5 memory blocks. Mapping tasks from video content-analysis applications from literature on the SA yields reductions in the execution time of 1-2 orders of magnitude compared to the software implementation. We conclude that the choice for an SA architecture is useful, but a scaled version of the SA featuring less logic with fewer processing and pipeline stages yielding a lower clock frequency, would be sufficient for a video analysis system-on-chip.

Paper Details

Date Published: 4 May 2010
PDF: 7 pages
Proc. SPIE 7724, Real-Time Image and Video Processing 2010, 772408 (4 May 2010); doi: 10.1117/12.851367
Show Author Affiliations
Julien A. Vijverberg, Eindhoven Univ. of Technology (Netherlands)
VDG Security B.V. (Netherlands)
Peter H. N. de With, Eindhoven Univ. of Technology (Netherlands)
CycloMedia Technology B.V. (Netherlands)

Published in SPIE Proceedings Vol. 7724:
Real-Time Image and Video Processing 2010
Nasser Kehtarnavaz; Matthias F. Carlsohn, Editor(s)

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