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Proceedings Paper

Sequential PPC and process-window-aware mask layout synthesis
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Paper Abstract

We present a full-chip implementation of model-based process and proximity compensation. Etch corrections are applied according to a two-dimensional model. Lithography is compensated by optimizing a cost function that expresses the design intent. The cost function penalizes edge placement errors at best dose and defocus as well as displacement of the edges in response to a specified change in a process parameter. This increases immunity to bridging in low contrast areas.

Paper Details

Date Published: 13 March 2006
PDF: 10 pages
Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 615613 (13 March 2006); doi: 10.1117/12.656667
Show Author Affiliations
Apo Sezginer, Invarium Inc. (United States)
Franz X. Zach, Invarium Inc. (United States)
Bayram Yenikaya, Invarium Inc. (United States)
Jesus Carrero, Invarium Inc. (United States)
Hsu-Ting Huang, Invarium Inc. (United States)

Published in SPIE Proceedings Vol. 6156:
Design and Process Integration for Microelectronic Manufacturing IV
Alfred K. K. Wong; Vivek K. Singh, Editor(s)

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