MacEtch: anisotropic metal-assisted chemical etching defies the textbooks

Etching is an essential step in semiconductor device processing. It can be carried out in either liquid or gas phase (termed wet and dry etching, respectively). Wet etching of most semiconductors proceeds isotropically, i.e., vertically and laterally at equal rates. The resulting loss of lateral resolution defined by masks makes wet etching unsuitable for producing high-aspect-ratio features. Dry etching methods such as reactive ion etching, on the other hand, are directional because etchants are ionized in the gas phase and accelerated toward the surface where etching takes place. High-aspect-ratio structures can be formed when appropriate masks are used to prevent local etching. The lateral resolution is typically defined by the mask itself. Unfortunately the achievable depth is limited by effects such as bottling and pinching off, whereby the etch proceeds unevenly.¹ Another undesirable side effect of dry etching is ion-induced damage to the sidewalls of the semiconductor, which dramatically increases nonradiative recombination of charge carriers at the surface, reducing the functioning of the structure in an electronic device. For silicon, thermal annealing has to be used to repair the surface damage. For compound semiconductors such as GaAs (gallium arsenide) and GaN (gallium nitride), ion-damage-related device degradation persists even when ion energy and etching rate are meticulously balanced and post-etch annealing is performed.

Defying textbook definitions of wet etching as being isotropic in nature, metal-assisted chemical etching (MacEtch) is fundamentally a wet but directional etching method. With MacEtch, we can produce anisotropic high-aspect-ratio semiconductor micro- and nanostructures without incurring lattice damage. MacEtch was first used as an electroless open-circuit etching technique (instead of the conventional anodic etching method) to produce porous silicon (Si).² In MacEtch, a discontinuous layer of a noble metal such as gold is deposited on the semiconductor, which is then put in an etching solution consisting of an oxidant (e.g., hydrogen peroxide) and an acid (e.g., hydrogen fluoride solution). The noble metal serves as a local cathode to catalyze the reduction of the oxidant, producing holes. These holes then migrate into the valence band of the semiconductor to create an ionic material soluble in the acid.

Figure 1. Using the MacEtch process to produce semiconductor pillar arrays. The gold (Au) mesh pattern descends into the semiconductor by removing material directly underneath, leaving behind an array of semiconductor pillars.

Under controlled etching conditions, MacEtch reactions occur only at the interface between the metal and the semiconductor. As a result, the metal layer descends as the underlying semiconductor is eroded.^{3, 4} By patterning the catalyst metal using lithographic or other methods, we can create micro- and nanostructures of corresponding shape and size. Figure 1 illustrates the MacEtch process to form pillar arrays. When the metal mesh pattern descends into the semiconductor, it removes the semiconductor along the way and leaves behind a 3D semiconductor pattern that is the inverse of the metal pattern. The metal can be chemically removed from the semiconductor surface after MacEtch.

MacEtch of Si has been widely accepted and practiced as a method to produce high-aspect-ratio structures such as nanowire arrays. However, MacEtch of III-V materials to produce periodic nanostructures, especially in high aspect ratios, has hardly been explored. The main challenge for implementing MacEtch of III-V materials is the inherently small differential etch rate with and without metal presence under common MacEtch conditions. Through the right combination of oxidant, acid, and temperature, our recent work⁵ successfully demonstrated that ordered arrays of high-aspect-ratio GaAs nanostructures can be formed using Au-MacEtch (MacEtch where the noble metal used is gold, Au).

Figure 2. Scanning electron microscope image (inset: zoomed-in view) of an array of gallium arsenide pillars formed by MacEtch with gold.

Figure 2 shows an array of GaAs pillars formed by immersing an n⁺-type GaAs wafer coated with an Au-mesh pattern in a MacEtch solution consisting of potassium permanganate and sulfuric acid at 40°C for 5 minutes. The Au mesh pattern was produced by soft lithography in this case. Although only n-type GaAs MacEtch is demonstrated here, MacEtch should work for other III-V semiconductors and different doping types and levels. Different structures may also be formed, as long as the right conditions for differential etching with and without metal can be found.

Because it occurs near room temperature, MacEtch does not introduce metal contamination into the core of the etched structure, in contrast to bottom-up high-temperature metal-catalyzed nanowire growth. The aspect ratio is mainly limited by etching time, which allows extremely high-aspect-ratio vertical structures to be generated. And as a wet etch process, MacEtch avoids ion-induced surface damage typically seen in dry etch processes. This is crucial to III-V nanostructures for optoelectronic applications.

In summary, MacEtch is a simple and efficient semiconductor etching technique that is capable of producing high-aspect-ratio semiconductor nanostructures beyond just Si. This method can potentially transform the fabrication of device structures that are currently fabricated by dry etch or bottom-up growth and assembly techniques. MacEtch also brings affordability and potential new device concepts for nanostructure-based photonic and electronic devices. Going forward, we plan to establish parameters for MacEtch of other III-V semiconductors, as well as other types of patterns. We hope to demonstrate MacEtch-fabricated passive and active devices including photonic crystals, distributed Bragg reflectors and distributed feedback lasers in the future.

Xiuling Li would like to acknowledge Jae Cheol Shin and Mathew Dejarld for their help with the figures, and NSF award #0749028 (CMMI) and DOE award #DEFG02-07ER46471 for funding.