Growing better graphene by finding the best copper surface
Since its isolation in 2004, graphene, a honeycomb-structured, single layer of carbon atoms, has sparked the curiosity of engineers and physicists worldwide. Graphene possesses amazing physical properties: as a viable replacement for indium tin oxide in photovoltaics, and silicon in RF switching applications. Using a process known as chemical vapor deposition (CVD), graphene can be grown on copper,1 and companies have produced 30-inch graphene sheets on copper foils.2 Employing copper in these processes is appealing: copper is relatively cheap and—it is thought—causes only a single layer (monolayer) of graphene to grow. Many electronics applications for which graphene is grown require such monolayer films and require them to be defect-free. However, careful examination reveals that copper-grown films are riddled with defects and multilayer regions, indicating that growing high-quality graphene remains challenging. What is causing these graphene defects and multilayers, and how can we overcome them?
Growing graphene by CVD involves heating carbon-containing gases to high temperature (>700°C) in a chamber containing hydrogen, argon, and the copper growth surface. Imprecise gas control during graphene growth is one cause of graphene defects and multilayer island formation.3 Furthermore, rough copper surface features bring about random graphene nucleation and growth,4 increasing defect density and layer number. A closer inspection reveals that typical copper foil surfaces contain different crystalline facets, each having a different atomic structure. In our recent work5 we found that the formation of defect-free, monolayer graphene depends critically on the copper's crystalline structure. Understanding these effects and how to control them will lead to better graphene. We perform a number of imaging and spectroscopic techniques on grown graphene for different copper facets, giving us information about the copper's influence on growth.5
Within graphene growth, typical carbon-containing gases, such as methane (CH4) and ethylene (C2H4), must lose their hydrogen components to form graphene. Copper's crystalline facets, by their different atomic structures, affect this dehydrogenation process. On some facets, the hydrogen atoms are not freed, preventing free carbon formation and stopping graphene growth. Even when there are free carbon atoms, they have to diffuse on the copper facets and find other carbons for graphene formation. Some of the copper facets slow down this carbon diffusion.
To assess copper substrate effects on graphene growth, we determined the underlying copper crystal structure. We did this through a large-area imaging method known as electron-backscatter diffraction (EBSD): see Figure 1. With EBSD, we found three low-index copper facets—Cu(100), Cu(110), and Cu(111)—as well as high-index facets, which are made up of linear combinations of the low-index facets. Knowing that copper is a face-centered cubic metal, the Cu(100), Cu(110), and Cu(111) surfaces have cubic, rectangular, and hexagonal atomic geometries. Graphene's honeycomb structure is most commensurate with the hexagonal Cu(111), suggesting that graphene growth might be the best on that facet. Accompanying EBSD with other imaging techniques, such as scanning electron microscopy (SEM), Raman spectroscopy, and atomic force microscopy (AFM), allowed us to verify that hypothesis.
We determined the presence, quality, and thickness of graphene on copper by SEM and Raman measurements. SEM imaging (see Figure 2) showed that graphene had the highest growth rate on the hexagonal Cu(111) surface. In fact, graphene on Cu(111) would often overgrow into its neighboring facets. Further, graphene's growth rate increased linearly as a function of what percentage of (111) facets the underlying copper had. The square Cu(100) prevented carbon diffusion and caused compact graphene islands to form. Additionally, (100)-rich high-index surfaces caused similar graphene islands.
Raman spectra for graphene on different copper facets showed that graphene grows on Cu(111) as a monolayer and is relatively defect-free. Graphene on Cu(100) was more multilayered, doped, and defect-riddled. Graphene on high-index, (111)-rich facets—such as Cu(632) and Cu(533)—had a high percentage of monolayer coverage. Finally, AFM measurements eliminated the possibility of surface roughness—i.e., Cu(111) being flatter than Cu(632) or Cu(533)—causing the crystal-related growth effects.
Graphene's applications demand control of layer growth and low-defect density. To date, an industrial-scale graphene CVD method addressing these criteria has proven challenging. Our results show this is partially due to copper itself. By making the copper surface more (111)-rich, through long, high-temperature anneals or by growing on single-crystal Cu(111), one can produce the high-quality, monolayer graphene film required in graphene applications. Our future work will involve further optimizations of graphene growth, as well as studying the effects of these optimizations on graphene device performance.
We acknowledge funding from the Office of Naval Research through grants N00014-06-10120 and N00014-09-0180, the Air Force Office of Scientific Research Young Investigator Award FA9550-10-1-0082, and the National Defense Science and Engineering Graduate Fellowship through the Army Research Office.
University of Illinois
Joseph W. Lyding received his PhD from Northwestern University (1983). He is a professor in the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign and a full-time faculty member in the Nanoelectronics and Nanomaterials group of the Beckman Institute. His fields of professional interest are scanning tunneling microscopy, nanofabrication, nanoelectronics, and IC chip reliability.
Joshua D. Wood graduated with highest distinction from Valparaiso University (2008) with a degree in computer engineering. He has since been at the University of Illinois at Urbana-Champaign in the Department of Electrical and Computer Engineering. He focuses on scaling carbon-based nanotechnology, particularly carbon nanotubes and graphene.
Eric Pop joined the Department of Electrical and Computer Engineering in 2007. His research interests are in energy-efficient electronics, novel 2D and 1D devices and materials, and nanoscale energy conversion and harvesting. He received his PhD in electrical engineering from Stanford (2005) and his MEng/BS in electrical engineering and BS in physics from the Massachusetts Institute of Technology (1999).